INSTRUCTION SET
EXPLAINED

This is a detailed description of each instruction for the
PIC12C508A and PIC16F84 microcontrollers.
The two Instruction Sets can be found on the previous pages


Page 7
INDEX

Note: The numbers 00h, 01h, etc represent files in the 508A and F84. The diagram below shows the files in each chip.


For the PIC12c508A, files 00h to 06h are Special Purpose Registers used by the microcontroller, with file 06h commonly called the input/output port.
For the PIC16F84, files 00h to 0Bh are Special Purpose Registers used by the microcontroller. Files 05h and 06h are the input/output ports.

Files 0C to 1F in the PIC12C508A match up with files in the PIC16F84 and these are the ones we use so that a program will work in either microcontroller.

ADDLW 00h to FFh Add Literal with W. (not available for 508A)

ADDWF 00h to 1Fh,0 Add W and a file. The result is stored in the W register.

ADDWF 00h to 1Fh,1 Add W and a file. The result is stored in the F register.
ADD the contents of the W register with a file. The result can be held in the W register or put back into the named file.Three flags in the STATUS register are affected by the ADD command:
Carry, Zero and Digit Carry. 
If the result of an ADD instruction is greater than 255, the Carry flag is set (1), otherwise it is 0. 
If the result of an ADD instruction is zero, the zero flag is set(1), otherwise it is 0.
The PIC monitors the lowest nibble in an addition and if the result is higher than "F," the Digit Carry flag is set (1), otherwise it is 0. For instance, if 2A is added to 3C, the result is 5D and this does not affect the carry flag. But if 2D is added to 3E, the result is 6B and the Digit Carry flag is set (1).

ANDLW 00 to FF AND Literal with W
The purpose of the AND operation is to detect when the same bits in two binary numbers are set (1).
In this instruction, the contents of the W register is ANDed with a fixed number (called the literal) and the result is placed in the W register. The literal can be 00 to FF.
The AND operation can be used to mask (remove) any bits as needed.
For example: 0F will mask the high nibble and F0 will remove the low nibble.

Using 0F:

First number:

1001 0011

Second number (0F):

0000 1111

ANDed answer:

0000 0011



Using F0:

First number:

1001 0011

Second number (F0):

1111 0000

ANDed answer:

1001 0000

ANDWF 00 to 1F,0 AND W with f The result is stored in the W register.

ANDWF 00 to 1F,1 AND W with f The result is stored back in the file.
The W register is ANDed with register `f.' Two files cannot be ANDed together. One file must be moved into W and ANDed with the second file.
See above for masking operations for the AND operation.
With the three AND instructions, only the Zero flag is affected. If the answer is zero, the Zero flag in the STATUS register is set (1). If the answer is greater than zero, the flag is 0.

BCF 00h to 1Fh,bit Clear the Bit in the named file. 00h to 4Fh,bit for F84
Use only files 00h to 1Fh if you want to transfer programs from F84 to 508A.
Each file has 8 bits: 0,1,2,3,4,5,6,7.
BCF means to clear (make logic 0) the identified bit in a named file. e.g: BCF 6,5 means that bit 5 of file 6 is to be cleared.

BSF 00h to 1Fh,bit Set the Bit in the named file. 00h to 4Fh,bit for F84
Each file has 8 bits: 0,1,2,3,4,5,6,7.
BSF means to set (make logic 1) the identified bit in a named file. e.g: BSF 6,5 means that bit 5 of file 6 is to be set.

BTFSC 00h to 1Fh,bit Bit Test, Skip if Clear 00h to 4Fh,bit for F84
BTFSC means to test the identified bit in the named register and skip the next instruction if it is 0.
BTFSC 6,4 means to test bit 4 in file 6 and skip the next instruction if bit 4 is zero.

BTFSS 00h to 1Fh,bit Bit Test, Skip if Set 00h to 4Fh,bit for F84
BTFSS means to test the identified bit in the named file and skip the next instruction if it is 1.
BTFSS 3,2 means to test bit 2 in file 3 and skip the next instruction if bit 2 is 1.

CALL Call Subroutine e.g: CALL Tone1 Tone1 is a sub-routine and the word Tone1 is called a Label.
For the PIC12C508A, the CALL instruction can only address locations 000 to 0FF.
For the PIC16F84, the CALL instruction can address all memory.
Programs should be written as a "Main Program" (at the end of your program) and a number of sub-routines. The sub-routines are called by a CALL command. The end of any sub-routine must contain a RETLW 00 instruction for the 508A or a RETURN for an F84.
A further call can be made from the sub-routine but each time a CALL instruction is executed, an address value is placed (PUSHED) into the stack so the micro knows where to come back to after the sub-routine is executed and the stack can only be 2-high for a 508A or 8-high for an F84.

CLRF 00h to 1Fh Clear a file. 00h to 4Fh for F84
The contents of a file is cleared and the Z bit is set. That is: all 8 bits become 0.

CLRW Clear W
The working register (W) is cleared. All bits are made (0's). Zero bit (Z) is set (1).

CLRWDT Clear Watchdog Timer
CLRWDT instruction resets the Watchdog Timer. It also resets the prescaler of the WDT.

COMF 00h to 1Fh,0 Complement f. The result is in W 00h to 4F,0h for F84

COMF 00h to 1Fh,1 Complement f. The result is in f 00h to 4Fh,1 for F84
The contents of file `f' are complemented (0's are changed to 1's and 1's to 0's).

DECF 00h to 1Fh,0 Decrement f. The result is in W 00h to 4F,0h for F84

DECF 00h to 1Fh,1 Decrement f . The result is in f 00h to 4F,1h for F84
The contents of file `f' are decremented. This simply means 1 is deducted (taken) from the file. If the file is 0000 0000 it rolls over to 1111 1111 (255). When the file is 0000 0001 and a DECF instruction is executed, the file becomes 0000 0000 and the Zero flag is set (1), otherwise it is (0).

DECFSZ 00h to 1Fh,0 Decrement f, Skip if 0. The result is in W 4F,0h for F84

DECFSZ 00h to 1Fh,1 Decrement f, Skip if 0. The result is in f 2F,0h for F84
Normally, the contents of a file are decremented and the result will not be zero, so the next instruction is executed, such as GOTO an address above and execute another DECFSZ. Eventually the result will be zero and the GOTO instruction will be passed over. The next instruction may be a normal instruction, a RETURN or RETLW 00, and it will be executed.

GOTO is an unconditional branch. E.g: GOTO Tone-2 Tone-2 is a sub-routine and the word Tone-2 is a label.

INCF 00h to 1Fh,0 Increment f. The result is in W 00h to 4Fh,0 for F84

INCF 00h to 1Fh,1 Increment f. The result is in f 00h to 4Fh,1 for F84
The contents of file `f' are incremented. This simply means 1 is added to the file. If the file is 1111 1111 (255), it rolls over to 0000 0000. When the file is 1111 1111 and an INCF instruction is executed, the file becomes 0000 0000 and the Zero flag is set (1), otherwise it is (0).

INCFSZ 00h to 1Fh,0 Increment f, Skip if 0 The result is in W

INCFSZ 00h to 1Fh,1 Increment f, Skip if 0 The result is in f
Normally, the decrement function DECFSZ is used to create a delay, but an INCFSZ can be used.
It works like this: The contents of a file are incremented and the result will not be zero, so the next instruction is executed, such as GOTO an address above and execute another INCFSZ. Eventually the file will be 1111 1111 and the next increment will roll it over to 0000 0000. The result will be zero and the GOTO instruction will be passed over. The next instruction may be a normal instruction, a RETURN or RETLW 00, and it will be executed.

IORLW 00h to FFh Inclusive OR Literal with W
The contents of the W register is OR'ed with the literal (a number). The result is placed in the W register. The literal can be 00 to FF.
This is simply an `OR' operation and the purpose of performing it is to change two or more bits to `1."
If a bit is ORed with 0, the answer is unchanged.
If a bit is ORed with 1, the result is 1.
If the working register (W) is loaded with 1111 0000 and a number such as 0100 1110 is ORed with W, the result is 1111 1110.

IORWF 00h to 1Fh,0 Inclusive OR W with f. The result is in W

IORWF 00h to 1Fh,1 Inclusive OR W with f. The result is in f
The contents of the W register is OR'ed with file f. This is simply an `OR' operation and the purpose of performing it is to change two or more bits to `1."
If a bit is ORed with 0, the answer is unchanged.
If a bit is ORed with 1, the result is 1.
If the working register (W) is loaded with 1111 0000 and a file with a number such as 0100 1110 is ORed with W, the result is 1111 1110.

MOVLW 00 to FF Move Literal to W
A fixed number (called the Literal) is loaded into W. The literal can be 00 to FF. The literal can then be placed into a file with the instruction: MOVWF 00h to 1Fh

MOVF 00h to 1Fh,0 Move f The result is in W 00h to 4Fh,0 for F84

MOVF 00h to 1Fh,1 Move f The result is in f 00h to 4Fh,1 for F84
For the instruction MOVF 00h to 1Fh,1 the contents is moved out of the file and back into it again. This is a useful test since the zero flag (Z) is affected. If the contents are zero, the Z flag is set (1). If the contents are not zero, the Z flag is (0)

MOVWF 00h to 1Fh Move W to f 00h to 4Fh for F84
This instruction copies data from W to a file.

NOP No Operation
The micro performs a No Operation.

OPTION Load OPTION register
The contents of W is loaded into the OPTION register.

RETLW 00 to FF Return with Literal in W
The W Register is loaded with the literal value. The Program Counter is loaded from the top of the stack (the return address).

RETURN Return from Subroutine.  Not Available for the PIC12C508A. Use RETLW 00 to FF
The stack is POPed and the top of the stack (TOS) is loaded into the Program Counter.

RLF 00h to 1Fh,0 Rotate Left f through Carry. The result is stored in W

RLF 00h to 1Fh,1 Rotate Left f through Carry. The result is stored in f
The contents of a file is rotated one bit to the left through the Carry Flag. This is a 9-shift to get the file back to original.

RRF 00h to1Fh.0 Rotate Right f through Carry. The result is stored in W

RRF 00h to 1Fh,1 Rotate Right f through Carry The result is stored in f
The contents of a file is rotated one bit to the right through the Carry Flag. This is a 9-shift to get the file back to original.

SLEEP Sleep
The power-down status bit PD is cleared. Time-out status bit, TO is set. Watchdog Timer and its prescaler are cleared. The processor is put into SLEEP mode with the oscillator stopped.

SUBLW 00 to FF Subtract W from Literal
The W register is subtracted (2's complement method) from the literal value. The result is placed in W.
This instruction is not available in the '508A instruction-set. For SUBLW 80h, use the following 5 instructions:

MOVWF 13h ;Move W to any file to save W
MOVLW 80h ;Put any literal into W, such as 80h
MOVWF 14h ;Move W to any file
MOVF 13h,0  ;Move W back into W
SUBWF 14h,0 ;SUBtract W from literal

SUBWF 00h to 1Fh,0 Subtract W from the file Result is in W

SUBWF 00h to 1Fh,1 Subtract W from the file. Result is in f
Subtract (2's complement method) W register from file 00 to 1F. (00 to 4F for F84)

SWAPF 00 to 1Fh,0 Swap Nibbles in the file Result is in W.

SWAPF 00 to 1Fh,1 Swap Nibbles in the file Result is in f.
The upper and lower nibbles of a file 00 to 1F are exchanged. (00 to 4F for F84)

TRIS 06 Load the TRIS Register for 508A
This instruction loads TRIS with the contents of W.
The two set-up instructions are:

MOVLW xxh  ;Load W with a value
TRIS 06 ;Load TRIS with the value

See OPTION in Library of Terms and Routines to make sure GP2 is an output. The '508A has only 6 lines in the port and uses the 6 lower bits. If W is (0000 1000) all lines are output except GP3. Note: GP3 can only be an INPUT.

TRIS 05 Load TRISA Register for F84

TRIS 06 Load TRISB Register for F84

XORLW 00 to FF Exclusive OR Literal with W
The contents of W is XOR`ed with a literal value. The result is placed in W.

XORWF 00h to 1Fh,0 Exclusive OR W with f The result is in W

XORWF 00h to 1Fh,1 Exclusive OR W with f The result is in f
Exclusive OR the contents of W with a file (00 to 1Fh for 508A or 00h to 4Fh for F84). Use only files 00h to 1F to make the F84 compatible with 508A.

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